| CSC 8400 | Computer Organization | Spring 2007 |
| SYLLABUS |
| Meetings |
Section 1: Mondays 6:15pm-9:00pm,
Mendel Science Center G88 |
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| Instructor | Dr. Thomas Way 160A Mendel Science Center |
Email: thomas.way@villanova.edu IM: DrTomWay Phone: (610) 519-5033 |
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| Office hours | (See my web site) |
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| Teaching Assistant | See instructor for help. General help is available from
Programming Assistants. Office hours: see Programming Assistants' schedule on CS Dept. web site |
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| Textbook | Computer Architecture: A Quantitative Approach, John L. Hennessy & David A. Patterson, Morgan Kaufmann Publishers, Fourth Edition, 2006. | |||||||
| Prerequisite |
CSC 7100 Computer Systems (or the
equivalent) |
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| Web site |
http://www.csc.villanova.edu/~tway and follow the link for CSC 8400 |
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| Course description |
Evolution of computer
architectures; computer performance; instruction set types and addressing
modes; advanced pipelining; memory organization; caches, main memory and
virtual memory; storage technologies; input/output systems; hardware aspects
of interconnection networks; parallel computer architectures. This course
is on computer architecture, with the goal being to teach you the basic and
advanced
concepts and methods used in the organization and design of computer
hardware. |
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| Lesson plan |
The course closely follows the
textbook outline. Some additional material (videos, research papers, etc.)
will be included from time to time to supplement what we cover from the
text. Some C programming and Unix will be introduced as part of 3
hands-on workshop projects. Advanced computer architecture topics will
be studied throughout the semester. Some students have a strong
background in this subject from their undergraduate studies or career
experience, while others do not. Every effort will be made to present a
balance of advanced material while assuring a thorough understanding of the
fundamental concepts of computer architecture. |
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| Tentative schedule |
Introduction: Fundamentals of
Computer Design (Chapter 1, 1 week) Instruction Set Principles & Examples (Appendix B, 1 week) Pipelining and Instruction-Level Parallelism (Appendix A & Chapter 2, 3 weeks) Limits on Instruction-Level Parallelism (Chapter 3, 1 week) Multiprocessors & Thread-Level Parallelism (Chapter 4, 2 weeks) Review of Memory Hierarchy (Appendix C, 1 week) Memory Hierarchy Design (Chapter 5, 2 weeks) Storage Systems (Chapter 6, 2 weeks) Lab time (varies) Historical context videos (1 week) |
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| Grading policy |
30% Homeworks 30% Workshop projects 25% Final exam 15% Literature Review Paper +/- Participation (attendance, class discussion, intellectual contribution to class) |
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| Final grades |
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| Makeup Policy |
No missed tests without prior
excuse. Each case will be handled separately based on its own merits. Makeup
tests might be more difficult than regularly scheduled tests. Each student
is responsible for what is covered and assigned in any classes which they
miss. |
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| Late Assignment Policy |
No assignments will be accepted
late without the direct consent of the instructor prior to the due date of
the assignment. Typical penalty is 10% off for each day an assignment is
late. Absolutely no assignments will be accepted beyond the date of the
final exam. |
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| Academic Integrity | Although collaboration among students is welcome when discussing concepts, ideas and approaches, all graded assignments must represent the student's individual work, as set forth in the University's policy on Academic Integrity. This means that a student who attempts to submit the work of another student, or material copied and pasted from the Internet or other sources, as his or her own will at the minimum receive 0% credit for the assignment, and at the maximum a failing grade for the course, at the discretion of the instructor. | |||||||
Last updated: 1/16/07