1. Please explain figure 5-12 in regards to expanding opcode. Explain the whole concept of the expanding opcode, and how it benefits the ISA level.
Can you explain the section on expanding opcodes?
Please explain expanding of opcodes.
 


If the JVM uses zero registers to store variables, where is the stack
stored? in cache?

it is said that IP addresses will eventually run out with the number of users
today. what does the future hold if the ip addresses run out and what what kind
of new technology will need to be done to solve this? How did you get the nickname Boots? What exactly can be considered as an opcode? Could you please explain further the differences between kernal and user modes for the ISA level.


Page 336 talks about self modifying programs. Can you please go over this in class and explain exactly how this works, why it is needed and how often it occurs in programming?


Is it necessary for us to know the different formats of the Pentium II and UltraSPARC II or should we just be aware that different formats exist and be able to acknowledge the differences between both?

Are we going to have to know the details for the Pentium II, UltraSPARC II, and JVM ISA levels or are those just examples in the book?


how is it counterproductive (p. 327, 2nd full paragraph) to have the average instruction length minimized? why is alignment so important?
Couold you review the specifics of memory alignment and its implications.
Why do some machines require that the words be aligned? Is it the way the word is fetched?


Why can't the Pentium II, the UltraSPARC II, and JVM support binary coded decimal integer data types?


How can you tell which type of addressing should be used?


Please explain expanding codes.
Please explain how to convert infix to postfix notation.
Reverse Polish Notation is very confusing, especially figure 5-21, could you expplain that better than the book does, and is it important to know?

Please explain how having separate address spaces for instructions and data is not the same as having a split level 1 cache. What is an auxiliary carry?


Addressing Modes